TY  - JOUR
A1  - Bragard, Michael
A1  - van Hoek, H.
A1  - De Doncker, R. W.
T1  - A major design step in IETO concept realization that allows overcurrent protection and pushes limits of switching performance
JF  - IEEE transactions on power electronics
N2  - This paper presents the latest prototype of the integrated emitter turn-off thyristor concept, which potentially ranks among thyristor high-power devices like the gate turn-off thyristor and the integrated gate-commutated thyristor (IGCT). Due to modifications of the external driver stage and mechanical press-pack design optimization, this prototype allows for full device characterization. The turn-off capability was increased to 1600 A with an active silicon area of 823mm2 . This leads to a transient peak power of 672.1kW/cm² . Within this paper, measurements and concept assessment are presented and a comparison to state-of-the-art IGCT devices is provided.
Y1  - 2012
U6  - http://dx.doi.org/10.1109/TPEL.2012.2189136
SN  - 0885-8993
VL  - 27
IS  - 9
SP  - 4163
EP  - 4171
PB  - IEEE
CY  - New York
ER  - 
TY  - JOUR
A1  - Bragard, G.
A1  - Bragard, Michael
T1  - Ein kostengünstiges, universelles Modellbauinterface
JF  - Der mathematische und naturwissenschaftliche Unterricht : MNU ; Organ des Deutschen Vereins zur Förderung des Mathematischen und Naturwissenschaftlichen Unterrichts e.V.
N2  - Wir stellen einen USB-Baustein vor, der eine kostengünstige und universelle Möglichkeit schafft , im Unterricht den Themenkreis Messen-Steuern-Regeln zu behandeln. Die Funktionalität orientiert sich am CVK-Interface der Firma Fischertechnik. Im Gegensatz zu kommerziellen Lösungen erlaubt unser Aufbau auch den preiswerten Einsatz in Gruppen- oder Einzelarbeit. Abschließend berichten wir über ein Beispiel aus dem Unterrichtseinsatz.
Y1  - 2012
SN  - 0025-5866
VL  - 65
IS  - 5
SP  - 290
EP  - 293
PB  - Seeberger
CY  - Neuss
ER  - 
TY  - THES
A1  - Bragard, Michael
T1  - The integrated emitter turn-off thyristor : an innovative MOS-gated high-power device. - (Aachener Beiträge des ISEA ; 62)
N2  - This thesis introduces the Integrated Emitter Turn-Off (IETO) Thyristor as a new high-power device. Known state-of-the-art research activities like the Dual GCT, the ETO thyristor and the ICT were presented and critically reviewed. A comparison with commercialized solutions identifies the pros and cons of each type of device family. Based on this analysis, the IETO structure is proposed, covering most benefits of each device class. In particular the combination of a MOS-assisted turn-off with a thyristor-based device allows a voltage-controlled MOS switching and the low on-state voltage of the thyristors. The following synthesis of an IETO device stands on a three-dimensional field of optimization spanned by electric, mechanical and thermal aspects. From an electric point of view, the lowest possible parasitic inductance and resistance within the commutation path are optimization criteria. The mechanical construction has to withstand the required contact pressure of multiple kilo Newtons. Finally, thermal borders limit the maximum average current of the device. FEM simulations covering these three aspects are performed for several design proposals. An IETO prototype is constructed and measurements on various test benches attest thermal, mechanical and electric performance. A local decoupling of the external driver stage and the presspack housing is presented by a cable connection. This separation enables a thermal and mechanical independence, which is advantageous in terms of vibrations and thermal cycles including increased reliability. The electric pulse performance of the prototype device is a factor of 3.1 above today''s solutions. In single-pulse measurements, a current up to 1600 A was successfully turned off at 115°C with an active silicon area of 823 mm². One reason for this increased turn-off capability is the extremely low-inductive construction. Additional functionality of the IETO thyristor like over-current self-protection and defined short-circuit failure state are successfully verified.
Y1  - 2012
SN  - 978-3-8440-1152-4
N1  - Zugl.: Aachen, Techn. Hochsch., Diss., 2012
PB  - Shaker
CY  - Aachen
ER  - 
TY  - CHAP
A1  - Nötzold, K.
A1  - Uphues, A.
A1  - Wegener, R.
A1  - Soter, S.
A1  - Fink, K.
A1  - Bragard, Michael
A1  - Griessel, R.
T1  - Inverter based test setup for LVRT verification of a full-scale 2 MW wind power converter
T2  - EPE Joint Wind Energy and T&D Chapters Seminar : 28th and 29th of June 2012, in the Utzon Centre, Aalborg, Denmark ; papers, posters, presentations. - Session 2: Grid connection, compliance
Y1  - 2012
PB  - EPE Association
CY  - Brussels
ER  -