TY - CHAP A1 - Endress, Tim A1 - Bragard, Michael T1 - Recording of efficiency-maps of low-power electric drive systems using a flexible matlab-based test bench T2 - 2017 IEEE 58th International Scientific Conference on Power and Electrical Engineering of Riga Technical University (RTUCON) N2 - This paper introduces a hardware setup to measure efficiency maps of low-power electric motors and their associated inverters. Here, the power of the device under test (DUT) ranges from some Watts to a few hundred Watts. The torque and speed of the DUT are measured independent of voltage and current in multiple load points. A Matlab-based software approach in combination with an open Texas-Instruments (TI) hardware setup ensures flexibility. Exemplarily, the efficiency field of a Permanent Magnet Synchronous Machine (PMSM) is measured to proof the concept. Brushless-DC (BLDC) motors can be tested as well. The nomenclature in this paper is based on the new European standard DIN EN 50598. Special attention is paid to the calculation of the measurement error. Y1 - 2017 SN - 978-1-5386-3846-0 U6 - http://dx.doi.org/10.1109/RTUCON.2017.8124775 PB - IEEE CY - New York ER - TY - PAT A1 - Nötzold, K. A1 - Bragard, Michael A1 - Fink, K. A1 - Griessel, R. A1 - Wegener, R. T1 - Cascaded H-bridge converter with transformer based cell power balancing in each voltage level : [Patentschrift] Y1 - 2014 N1 - Titel des US-Patents: Bypassed cascaded cell converter : [patent of invention]. - Außerdem veröffentlicht als CN103997231 (A) PB - Europäisches Patentamt / United States Patent and Trademark Office [u.a.] CY - Den Haag / Alexandria, VA ER - TY - CHAP A1 - Nötzold, K. A1 - Uphues, A. A1 - Wegener, R. A1 - Fink, K. A1 - Bragard, Michael A1 - Griessel, R. A1 - Soter, S. T1 - Inverter based test setup for LVRT verification of a full-scale 2 MW wind power converter T2 - 15th European Conference on Power Electronics and Applications (EPE), 2013 : 2 - 6 Sept. 2013, Lille, France / [EPE Association; PELS, IEEE Power Electronics Society] Y1 - 2013 SN - 978-1-4799-0115-9 (Online-Ausg.) U6 - http://dx.doi.org/10.1109/EPE.2013.6634752 SP - 1037 EP - 1042 PB - IEEE CY - Piscataway, NJ ER - TY - JOUR A1 - Bragard, Michael A1 - van Hoek, H. A1 - De Doncker, R. W. T1 - A major design step in IETO concept realization that allows overcurrent protection and pushes limits of switching performance JF - IEEE transactions on power electronics N2 - This paper presents the latest prototype of the integrated emitter turn-off thyristor concept, which potentially ranks among thyristor high-power devices like the gate turn-off thyristor and the integrated gate-commutated thyristor (IGCT). Due to modifications of the external driver stage and mechanical press-pack design optimization, this prototype allows for full device characterization. The turn-off capability was increased to 1600 A with an active silicon area of 823mm2 . This leads to a transient peak power of 672.1kW/cm² . Within this paper, measurements and concept assessment are presented and a comparison to state-of-the-art IGCT devices is provided. Y1 - 2012 U6 - http://dx.doi.org/10.1109/TPEL.2012.2189136 SN - 0885-8993 VL - 27 IS - 9 SP - 4163 EP - 4171 PB - IEEE CY - New York ER - TY - THES A1 - Bragard, Michael T1 - The integrated emitter turn-off thyristor : an innovative MOS-gated high-power device. - (Aachener Beiträge des ISEA ; 62) N2 - This thesis introduces the Integrated Emitter Turn-Off (IETO) Thyristor as a new high-power device. Known state-of-the-art research activities like the Dual GCT, the ETO thyristor and the ICT were presented and critically reviewed. A comparison with commercialized solutions identifies the pros and cons of each type of device family. Based on this analysis, the IETO structure is proposed, covering most benefits of each device class. In particular the combination of a MOS-assisted turn-off with a thyristor-based device allows a voltage-controlled MOS switching and the low on-state voltage of the thyristors. The following synthesis of an IETO device stands on a three-dimensional field of optimization spanned by electric, mechanical and thermal aspects. From an electric point of view, the lowest possible parasitic inductance and resistance within the commutation path are optimization criteria. The mechanical construction has to withstand the required contact pressure of multiple kilo Newtons. Finally, thermal borders limit the maximum average current of the device. FEM simulations covering these three aspects are performed for several design proposals. An IETO prototype is constructed and measurements on various test benches attest thermal, mechanical and electric performance. A local decoupling of the external driver stage and the presspack housing is presented by a cable connection. This separation enables a thermal and mechanical independence, which is advantageous in terms of vibrations and thermal cycles including increased reliability. The electric pulse performance of the prototype device is a factor of 3.1 above today''s solutions. In single-pulse measurements, a current up to 1600 A was successfully turned off at 115°C with an active silicon area of 823 mm². One reason for this increased turn-off capability is the extremely low-inductive construction. Additional functionality of the IETO thyristor like over-current self-protection and defined short-circuit failure state are successfully verified. Y1 - 2012 SN - 978-3-8440-1152-4 N1 - Zugl.: Aachen, Techn. Hochsch., Diss., 2012 PB - Shaker CY - Aachen ER - TY - CHAP A1 - Nötzold, K. A1 - Uphues, A. A1 - Wegener, R. A1 - Soter, S. A1 - Fink, K. A1 - Bragard, Michael A1 - Griessel, R. T1 - Inverter based test setup for LVRT verification of a full-scale 2 MW wind power converter T2 - EPE Joint Wind Energy and T&D Chapters Seminar : 28th and 29th of June 2012, in the Utzon Centre, Aalborg, Denmark ; papers, posters, presentations. - Session 2: Grid connection, compliance Y1 - 2012 PB - EPE Association CY - Brussels ER - TY - CHAP A1 - Bragard, Michael A1 - Ronge, C. A1 - De Doncker, R. W. T1 - Sandwich design of high-power thyristor based devices with integrated MOSFET structure T2 - Proceedings of the 2011 - 14th - European Conference on Power Electronics and Applications (EPE 2011) : Aug. 30, 2011 - Sept. 1, 2011, Birmingham, United Kingdom Y1 - 2011 SN - 978-1-61284-167-0 (Print) SN - 978-90-75815-15-3 (Online) PB - IEEE CY - Piscataway, NJ ER - TY - CHAP A1 - Bragard, Michael A1 - Gottschlich, J. A1 - De Doncker, R. W. T1 - Design and realization of a credit card size driver stage for high power thyristor based devices with integrated MOS structure T2 - 2011 IEEE 8th International Conference on Power Electronics and ECCE Asia (ICPE & ECCE 2011) : Jeju, South Korea, 30 May 2011 - 3 June 2011 / [co-sponsored by the Korean Institute of Power Electronics ...] Y1 - 2011 SN - 978-1-61284-958-4 (Print) SN - 978-1-61284-956-0 (Online) U6 - http://dx.doi.org/10.1109/ICPE.2011.5944661 SP - 1182 EP - 1189 PB - IEEE CY - Piscataway, NJ ER - TY - JOUR A1 - Bragard, Michael A1 - Conrad, M. A1 - van Hoek, H. A1 - De Doncker, R. W. T1 - The integrated emitter turn-off thyristor (IETO) : an innovative thyristor-based high power semiconductor device using MOS assisted turn-off JF - IEEE transactions on industry applications Y1 - 2011 U6 - http://dx.doi.org/10.1109/TIA.2011.2161432 SN - 0093-9994 VL - 47 IS - 5 SP - 2175 EP - 2182 PB - IEEE CY - New York ER - TY - CHAP A1 - Bragard, Michael A1 - Soltau, N. A1 - De Doncker, R. W. A1 - Schmiegel, A. T1 - Design and implementation of a 5 kW photovoltaic system with li-ion battery and additional DC-DC converter T2 - 2010 IEEE Energy Conversion Congress and Exposition (ECCE 2010) : Atlanta, Georgia, USA, 12 - 16 September 2010 / [sponsored by the IEEE Power Electronics and Industry Applications Societies] Y1 - 2010 SN - 978-1-4244-5286-6 (Print) SN - 978-1-4244-5287-3 (Online) U6 - http://dx.doi.org/10.1109/ECCE.2010.5618220 SP - 2944 EP - 2949 PB - IEEE CY - Piscataway, NJ ER -